The present embodiments relate to generating one or more random bits.
In security-relevant applications (e.g., in asymmetrical authentication methods), random bit sequences are used as binary random numbers. In this case, it is desired to implement as little hardware outlay as possible, particularly in mobile applications. Known measures for generating random numbers include, for example, pseudo-random number generators, analog random sources, ring oscillators and modifications thereof.
In pseudo-random number generators, seeds are used. Proceeding from this, deterministic pseudo-random numbers are calculated. A physical random generator may be used for generating the seed. As analog random sources, noise sources such as, for example, the noise of zener diodes are amplified and digitized. In this case, the linking of digital with analog circuit technology may be realized only in a complex fashion.
In the case of ring oscillators constructed from an odd number of inverters connected in series, random jitter arises from fluctuating transient times of the signals through the inverters. The jitter (e.g., an irregular temporal fluctuation in state changes of the signals sent through the inverters) may be accumulated upon multiple passes through the ring oscillator circuit, such that ultimately a random analog signal arises. What is often disadvantageous in the case of ring oscillators is the long time required from the start of the oscillation until a usably random signal arises on account of the accumulation of jitter. Therefore, low, unacceptable data generation rates may arise in the case of ring oscillators. The accumulating jitter contributions may also cancel themselves out again, such that on average, random short gate transient times are compensated for by random longer gate transient times.
Fibonacci and Galois ring oscillators generate random signal waveforms more rapidly than traditional ring oscillators. However, different digital gates such as XOR and NOT gates are used. As a result, large differences in the speed of the types of gates may arise (e.g., in implementations on ASICs). It is often desired to generate random bit sequences with the aid of field programmable gate arrays (FPGAs). However, in these digital components, periodic oscillations that have only low entropy or randomness in the signals may commence (e.g., on account of ambient temperature fluctuations).
The power consumption in oscillator circuits in random number generators may prove to be disadvantageous, since an electric current is to continuously flow during operation.
In digital circuits, the current consumption essentially depends on the number of changeover processes per time. In corresponding digital oscillation circuits, this is to take place continuously, and a rather unfavorable power consumption arises in the case of random number generators based on ring oscillators. In the case of mobile applications, it is desirable to keep down the power consumption or the current consumption of the circuits implemented in terms of hardware. Nevertheless, statistically good physical random chance is intended to arise.